1. Field of the Invention
This invention relates to semiconductor fabrication, and more particularly to a method for fabricating a flash memory device with a high memory cell density.
2. Description of Related Art
Recently, a flash memory with a high memory cell density has significant applications in various apparatus designs. One main advantage of the flash memory is that each memory cell can be fabricated in a greatly reduced dimension, and fabrication cost is also greatly reduced. In a conventional flash memory, memory cells are isolated by a field oxide (FOX) structure that is formed by local oxidation (LOCOS). The FOX structure has its lower limitation of dimension. This causes the cell density is limited also.
Another typical isolation structure is a shallow trench isolation (STI) structure. Since the STI structure can be formed in a much less dimension than that of the FOX structure. An application of the STI structure in a flash memory can effectively minimize the cell dimension so that the cell density can be ultimately increased.
However, in this manner, an overlapping area between a floating gate and a control gate of the flash memory is accordingly small. This causes a smaller coupling ratio. A smaller coupling ratio causes a need of a higher bias applied on the control gate during erasing the information stored in the memory cells. Moreover, the flash memory with a smaller coupling ratio needs a higher electric field to obtain a Fowler-Nordheim (F-N) tunneling effect, and results in a less electron transmission rate between the floating gate and a source/drain region. The read/write manner therefore becomes slower. All above problems are induced by a less coupling ratio, which further results from a too small dimension. The dimension of the flash memory cell again cannot be further reduced. It is a goal to fabricate a flash memory having high cell density and large coupling rate.